The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Nov. 07, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Toshiyuki Sato, Inagi, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H03K 19/00 (2006.01); H01L 23/522 (2006.01); G11C 5/02 (2006.01); G11C 5/14 (2006.01); H01L 23/528 (2006.01); G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
H03K 19/0013 (2013.01); G11C 5/025 (2013.01); G11C 5/14 (2013.01); H01L 23/5226 (2013.01); H01L 23/5286 (2013.01); G11C 5/063 (2013.01); G11C 2207/105 (2013.01);
Abstract

Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad included in a pad formation area that receives a power voltage; a sub-threshold current reduction circuit (SCRC) included in a peripheral circuit area including a via disposed on a first side of the peripheral circuit area, and a wiring that couples the pad to the via. The SCRC further includes: a voltage line coupled to the via; a logic gate circuit that propagates a signal; an SCRC voltage line coupled to the logic gate circuit; and a SCRC switch disposed in proximity to the via and couples the SCRC voltage line to the voltage line.


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