The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Feb. 06, 2018
Applicant:

General Electric Company, Schenectady, NY (US);

Inventors:

Reza Ghandi, Niskayuna, NY (US);

David Alan Lilienfeld, Niskayuna, NY (US);

Alexander Viktorovich Bolotnikov, Niskayuna, NY (US);

Peter Almern Losee, Clifton Park, NY (US);

Assignee:

GENERAL ELECTRIC COMPANY, Niskayuna, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/16 (2006.01); H01L 21/02 (2006.01); H01L 27/092 (2006.01); H01L 21/265 (2006.01); H01L 21/324 (2006.01); H01L 27/088 (2006.01); H01L 21/761 (2006.01); H01L 21/82 (2006.01); H01L 27/06 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0646 (2013.01); H01L 21/02529 (2013.01); H01L 21/26506 (2013.01); H01L 21/324 (2013.01); H01L 21/761 (2013.01); H01L 21/8213 (2013.01); H01L 27/0605 (2013.01); H01L 27/088 (2013.01); H01L 27/092 (2013.01); H01L 29/1608 (2013.01); H01L 21/823481 (2013.01);
Abstract

An integrated circuit includes a silicon carbide (SiC) epitaxial layer disposed on a SiC layer, wherein the SiC epitaxial layer has a first conductivity-type and the SiC layer has a second conductivity-type that is opposite to the first conductivity-type. The integrated circuit also includes a junction isolation feature disposed in the SiC epitaxial layer and having the second conductivity-type. The junction isolation feature extends vertically through a thickness of the SiC epitaxial layer and contacts the SiC layer, and wherein the junction isolation feature has a depth of at least about 2 micrometers (μm).


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