The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2020

Filed:

Aug. 14, 2018
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventors:

Hidehiko Karasaki, Hyogo, JP;

Noriyuki Matsubara, Osaka, JP;

Atsushi Harikai, Osaka, JP;

Hidefumi Saeki, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/3065 (2006.01); B23K 26/0622 (2014.01); H01L 21/02 (2006.01); H01L 21/475 (2006.01); H01L 21/67 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3065 (2013.01); B23K 26/0624 (2015.10); H01L 21/02076 (2013.01); H01L 21/475 (2013.01); H01L 21/67069 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 2221/68327 (2013.01);
Abstract

Method of manufacturing an element chip which can suppress residual debris in plasma dicing. A back surface of a semiconductor wafer is held on a dicing tape. Then, a surface of the wafer is coated with a mask that includes a water-insoluble lower mask and a water-soluble upper mask. Subsequently, an opening is formed in the mask by irradiating the mask with laser light to expose a dividing region. Then, the semiconductor wafer is caused to come into contact with water to remove the upper mask covering each of the element regions while leaving the lower layer. After that, the wafer is exposed to plasma to perform etching on the dividing region exposed from the opening until the etching reaches the back surface, thereby dicing the semiconductor wafer into a plurality of element chips. Thereafter, the lower layer mask left on the front surface of the semiconductor chips is removed.


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