The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2020

Filed:

Dec. 27, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventor:

Franz Kuttner, St. Ulrich, AT;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03M 1/80 (2006.01); H04B 1/04 (2006.01); H03M 1/86 (2006.01); H04B 1/44 (2006.01);
U.S. Cl.
CPC ...
H03M 1/804 (2013.01); H03M 1/661 (2013.01); H03M 1/86 (2013.01); H04B 1/04 (2013.01); H04B 1/44 (2013.01); H04B 2001/0491 (2013.01);
Abstract

CDAC (Capacitive DAC (Digital-to-Analog Converter) unit cells and RFDACs (Radio Frequency DACs) employing such CDAC unit cells are disclosed that can be employed for mmWave (millimeter wave) communication are disclosed. One example CDAC unit cell comprises: four capacitors connected in pairs to two differential outputs of the CDAC unit cell; and four logic gates, wherein each logic gate of the four logic gates is configured to receive an associated clock signal of four different clock signals and an associated enable signal of four different enable signals, and wherein each logic gate of the four logic gates is configured to trigger an associated pulse from an associated capacitor of the four capacitors based on the associated clock signal and the associated enable signal of that logic gate.


Find Patent Forward Citations

Loading…