The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2020

Filed:

Nov. 30, 2018
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Gerhard Prechtl, Rosegg, AT;

Clemens Ostermaier, Villach, AT;

Oliver Häberlen, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 23/31 (2006.01); H01L 29/778 (2006.01); H01L 29/51 (2006.01); H01L 29/10 (2006.01); H01L 29/20 (2006.01); H01L 29/207 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3171 (2013.01); H01L 29/1066 (2013.01); H01L 29/4236 (2013.01); H01L 29/42316 (2013.01); H01L 29/42376 (2013.01); H01L 29/512 (2013.01); H01L 29/7786 (2013.01); H01L 29/2003 (2013.01); H01L 29/207 (2013.01);
Abstract

A semiconductor device includes a group III-semiconductor-nitride-based channel layer, a group III-semiconductor-nitride-based barrier layer formed on the channel layer, a two-dimensional electron gas channel formed in the channel layer, a first current electrode and a second current electrode formed on the barrier layer and laterally spaced from each other, and a gate structure formed on the barrier layer between the first and second current electrodes. The barrier layer has a symmetrically shaped recess between the first and second current electrodes, the symmetrically shaped recess including a first recess portion formed in a part of an upper surface of the barrier layer and a second recess portion formed within the first recess portion. The gate structure includes a group III-semiconductor-nitride-based doped layer that fills the symmetrically shaped recess and an electrically conductive gate electrode formed on an upper side of the doped layer that is opposite from the barrier layer.


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