The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2020

Filed:

Aug. 22, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bharat Daga, Bangalore, IN;

Ajit Singh, Bangalore, IN;

Pradeep Janedula, Bangalore, IN;

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06K 9/00 (2006.01); G06T 1/60 (2006.01); G06T 9/00 (2006.01); G06T 11/40 (2006.01);
U.S. Cl.
CPC ...
G06T 1/60 (2013.01); G06T 9/002 (2013.01); G06T 9/004 (2013.01); G06T 11/40 (2013.01);
Abstract

A mechanism is described for facilitating efficient memory layout for enabling smart data compression in machine learning environments. A method of embodiments, as described herein, includes facilitating dividing an initial tile representing an image into primary multiple tiles such that each tile of the primary multiple tiles is regarded as an independent image as processed by one or more processors of a computing device. The method may further include computing the primary multiple tiles into secondary multiple tiles compatible in size of a local buffer. The method may further include merging the multiple secondary multiple tiles into a final tile representing the image, and compressing the final tile.


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