The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Dec. 04, 2017
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

James Krehbiel, Chandler, AZ (US);

Nick Yang, Wilmette, IL (US);

Joseph Gerard Schultz, Wheaton, IL (US);

Enver Krvavac, Kildeer, IL (US);

Yu-Ting David Wu, Schaumburg, IL (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/07 (2006.01); H03F 1/02 (2006.01); H03F 3/195 (2006.01); H03F 3/60 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0288 (2013.01); H03F 3/195 (2013.01); H03F 3/605 (2013.01); H03F 2200/222 (2013.01); H03F 2200/318 (2013.01); H03F 2200/411 (2013.01); H03F 2200/451 (2013.01);
Abstract

Embodiments of a multiple-path amplifier (e.g., a Doherty amplifier) and a module housing the amplifier include a first amplifier (or first power transistor die) with a first output terminal, a second amplifier (or second power transistor die) with a second output terminal, and an impedance inverter line assembly electrically connected between the first and second output terminals. The impedance inverter line assembly includes a first transmission line and a surface mount component connected in series between the first and second output terminals. In various embodiments, the surface mount component is selected from a fixed-value capacitor, a fixed-value inductor, a tunable capacitor, a tunable inductor, and a tunable passive component network.


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