The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Oct. 18, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Jeremy Bruestle, Seattle, WA (US);

Choong Ng, Seattle, WA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 8/30 (2018.01); G06N 20/00 (2019.01); G06F 17/16 (2006.01); G06N 3/063 (2006.01); G06N 3/04 (2006.01); G06F 8/41 (2018.01); G06F 8/40 (2018.01); G06F 9/455 (2018.01); G06F 17/12 (2006.01);
U.S. Cl.
CPC ...
G06F 8/30 (2013.01); G06F 8/40 (2013.01); G06F 8/41 (2013.01); G06F 8/42 (2013.01); G06F 8/423 (2013.01); G06F 8/436 (2013.01); G06F 8/443 (2013.01); G06F 8/445 (2013.01); G06F 8/447 (2013.01); G06F 8/4441 (2013.01); G06F 8/45 (2013.01); G06F 9/45533 (2013.01); G06F 17/12 (2013.01); G06F 17/16 (2013.01); G06N 3/0454 (2013.01); G06N 3/063 (2013.01); G06N 20/00 (2019.01);
Abstract

Techniques to preprocess tensor operations prior to code generation to optimize compilation are disclosed. A computer readable representation of a linear algebra or tensor operation is received. A code transformation software component performs transformations include output reduction and fraction removal. The result is a set of linear equations of a single variable with integer coefficients. Such a set lends itself to more efficient code generation during compilation by a code generation software component. Use cases disclosed include targeting a machine learning hardware accelerator, receiving code in the form of an intermediate language generated by a cross-compiler with multiple front ends supporting multiple programming languages, and cloud deployment and execution scenarios.


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