The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Oct. 25, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jin-A Kim, Hwaseong-si, KR;

Yong-Kwan Kim, Yongin-si, KR;

Se-Keun Park, Suwon-si, KR;

Joo-Young Lee, Hwaseong-si, KR;

Cha-Won Koh, Yongin-si, KR;

Yeong-Cheol Lee, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 21/768 (2006.01); H01L 21/3065 (2006.01); H01L 21/285 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10855 (2013.01); H01L 27/10814 (2013.01); H01L 27/10823 (2013.01); H01L 27/10885 (2013.01); H01L 27/10888 (2013.01); H01L 21/28525 (2013.01); H01L 21/3065 (2013.01); H01L 21/76879 (2013.01);
Abstract

A semiconductor device and methods of manufacturing the same are provided. The semiconductor device includes a substrate, word lines, a doped junction, bit line structures, and buried contacts. The substrate has active regions. The word lines extend across the active regions. The doped junction has impurities and is arranged at the active regions, and includes first junctions and second junctions, each first junction arranged at a central portion of one of the active regions and each second junction arranged at an end portion of another one of the active regions, a buried semiconductor layer being included in each second junction. The bit line structures contact with a respective one of the first junctions. The buried contacts are arranged in a matrix shape, each contacting with a respective one of the second junctions and the included buried semiconductor layer and simultaneously contacting with a charge storage for storing data.


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