The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Mar. 30, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Chunyu Zhang, Folsom, CA (US);

Kevin E. Arendt, Folsom, CA (US);

Hongjiang Song, Mesa, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/10 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/102 (2013.01); G06F 13/4068 (2013.01);
Abstract

An apparatus is described having an electrical interface that supports a first specification and a second specification. The first specification specifies differentially transmitted data. The second specification specifies at least three transmitted data signals. The electrical interface includes a plurality of modular transmitter circuits where each transmitter circuit includes a single ended driver and a select circuit. The select circuit is to select either one end of a differential signal associated with the first specification or one of the at least three transmitted data signals associated with the second specification.


Find Patent Forward Citations

Zhang, Chunyu. (2020). Multi-standard single interface with reduced i/o count (U.S. Patent No. 10585812). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10585812

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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