The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Jun. 11, 2018
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Zi-Jun Liu, Kaohsiung, TW;

Ping-Chia Shih, Tainan, TW;

Chi-Cheng Huang, Kaohsiung, TW;

Kuo-Lung Li, Yunlin County, TW;

Hung-Wei Lin, Kaohsiung, TW;

An-Hsiu Cheng, Pingtung County, TW;

Chih-Hao Pan, Kaohsiung, TW;

Cheng-Hua Chou, Kaohsiung, TW;

Chih-Hung Wang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/62 (2006.01); H01L 27/112 (2006.01); H01L 27/11521 (2017.01); H01L 27/1156 (2017.01); H01L 21/762 (2006.01); H01L 21/3115 (2006.01); H01L 21/311 (2006.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11206 (2013.01); H01L 21/76224 (2013.01); H01L 27/1156 (2013.01); H01L 27/11521 (2013.01); H01L 21/3115 (2013.01); H01L 21/31116 (2013.01); H01L 29/40114 (2019.08);
Abstract

Provided is a semiconductor structure including a substrate, an isolation structure, a fuse and two gate electrodes. The isolation structure is located in the substrate and defines active regions of the substrate. The fuse is disposed on the isolation structure. The gate electrodes are disposed on the active regions and connected to ends of the fuse. In an embodiment, a portion of a bottom surface of the fuse is lower than top surfaces of the active regions of the substrate.


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