The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Jan. 30, 2018
Applicant:

Seagate Technology Llc, Cupertino, CA (US);

Inventors:

Yunxiang Wu, Cupertino, CA (US);

Yu Cai, San Jose, CA (US);

Zhengang Chen, San Jose, CA (US);

Erich Haratsch, San Jose, CA (US);

Assignee:

Seagate Technology LLC, Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/52 (2006.01); G06F 11/10 (2006.01); G11C 11/56 (2006.01); G11C 16/34 (2006.01); G11C 29/02 (2006.01); G11C 7/14 (2006.01); G11C 29/50 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G06F 11/1012 (2013.01); G06F 11/1072 (2013.01); G11C 11/5642 (2013.01); G11C 16/349 (2013.01); G11C 29/028 (2013.01); G06F 2212/403 (2013.01); G11C 7/14 (2013.01); G11C 29/021 (2013.01); G11C 29/50004 (2013.01); G11C 2029/0409 (2013.01); G11C 2029/0411 (2013.01);
Abstract

Log likelihood ratio (LLR) values that are computed in a flash memory controller during read retries change over time as the number of program-and-erase cycles (PECs) that the flash memory die has been subjected to increases. Therefore, in cases where an LLR table is used to provide pre-defined, fixed LLR values to the error-correcting code (ECC) decoding logic of the controller, decoding success and the resulting BER will degrade over time as the number of PECs to which the die has been subjected increases. In accordance with embodiments, a storage system, a flash memory controller for use in the storage system and method are provided that periodically measure the LLR values and update the LLR table with new LLR values. Periodically measuring the LLR values and updating the LLR table with new LLR values ensures high decoding success and a low BER over the life of the flash memory die.


Find Patent Forward Citations

Loading…