The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Dec. 22, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Yao Zu Dong, Shanghai, CN;

Kun Tian, Shanghai, CN;

Tian Zhang, Shanghai, CN;

Yulei Zhang, Shanghai, CN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 1/20 (2006.01); G06F 9/48 (2006.01);
U.S. Cl.
CPC ...
G06T 1/20 (2013.01); G06F 9/4887 (2013.01);
Abstract

An apparatus and method for best effort quality of service scheduling in a graphics processing architecture. For example, one embodiment of an apparatus comprises: a graphics processing unit (GPU) to perform graphics processing operations for a plurality of guests; a plurality of buffers to store one or more graphics commands associated with each guest to be executed by the GPU; and a scheduler to evaluate commands in the buffers of a first guest to estimate a cost of executing the commands, the scheduler to select all or a subset of the buffers of the first guest for execution on the GPU based on a determination that the selected buffers can be executed by the GPU within a remaining time slice allocated to the first guest.


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Dong, Yao. (2020). Method and apparatus for best effort quality of service (qos) scheduling in a graphics processing architecture (U.S. Patent No. 10580108). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10580108

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