The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Mar. 19, 2018
Applicant:

Stmicroelectronics International N.v., Schiphol, NL;

Inventors:

Nitin Gupta, Kurukshetra, IN;

Jeet Narayan Tiwari, Greater Noida, IN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/07 (2006.01); H03L 7/099 (2006.01); H03L 7/095 (2006.01);
U.S. Cl.
CPC ...
H03L 7/07 (2013.01); H03L 7/095 (2013.01); H03L 7/0992 (2013.01); H03L 2207/50 (2013.01);
Abstract

Disclosed is a method of locking a locked loop quickly, including receiving an input signal having an input frequency, and generating an intermediate signal having an intermediate frequency intended to be equal to a geometric mean of the input frequency and a desired frequency, but not equal. Results of division of the desired output frequency by the intermediate frequency are estimated, producing a first divider value. A first locked loop utilizing a controllable oscillator is activated. A divider value of the first locked loop is set to the first divider value, and the intermediate signal is provided to the first locked loop, so that when the first locked loop reaches lock, the controllable oscillator produces the desired frequency. When the first locked loop reaches lock, a second locked loop that utilizes the controllable oscillator is activated, the first locked loop is deactivated, and generation of the intermediate signal is ceased.


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