Standard cell design conformance using boolean assertions

Abstract

Disclosed techniques conform standard cells in an integrated circuit design into a valid template pattern using a template-based approach to standard cell design. The template architecture stores valid patterns of circuit elements for the design. A Boolean expression comprising an aggregated set of Boolean assertions can be generated for each different combination of cell shape features and edge locations with the cell design to compute a solution that matches with a valid pattern in one of the templates. If the solution evaluates to a Boolean TRUE result, the cell shape(s) can be modified in accordance with the solution. If not, the granularity can be updated by incrementing an 'adjustment neighborhood' value and iterating the computations for shape features and edge locations using the updated values for the analysis until a Boolean TRUE result is found or it is determined there is no solution for the set of expressions.