The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Nov. 29, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Barak Hermesh, Pardes Hana, IL;

Ziv Kfir, Yavne, IL;

Amos Klimker, Jerusalem, IL;

Doron Nakar, Shoham, IL;

Lior Nevo, Even Yehuda, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/123 (2016.01); G06F 12/0862 (2016.01); G06F 9/50 (2006.01); G06F 9/38 (2018.01);
U.S. Cl.
CPC ...
G06F 12/123 (2013.01); G06F 9/3855 (2013.01); G06F 9/5016 (2013.01); G06F 12/0862 (2013.01);
Abstract

Various systems and methods for queue management in computer memory are described herein. A system for implementing a zero thrash cache queue manager includes a processor subsystem to: receive a memory access request for a queue; write data to a queue tail cache line in a cache when the memory access request is to add data to the queue, the queue tail cache line protected from being evicted from the cache; and read data from a current queue head cache line in the cache when the memory access request is to remove data from the queue, the current queue head cache line protected from being evicted from the cache.


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