The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 2020
Filed:
Dec. 22, 2017
Applicant:
Cadence Design Systems, Inc., San Jose, CA (US);
Inventors:
Chung-Do Yang, Saratoga, CA (US);
Hoi-Kuen Lam, Saratoga, CA (US);
John Mario Wilkosz, Pflugerville, TX (US);
Assignee:
Cadence Design Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2858 (2013.01); G06F 17/5045 (2013.01); G06F 17/5081 (2013.01); G06F 2217/06 (2013.01); G06F 2217/12 (2013.01);
Abstract
Described is an improved approach to implement EM analysis, where the analysis can be performed early stages of the design process. Tree-routing is implemented using a structural routing solution, where an automatic routing mechanism is performed to generate a complete routing tree. That routing tree is then used to perform topology-driven EM analysis at various stages of the design process.