Non-volatile memory with single ended read scheme using distributed common mode feedback

Abstract

A non-volatile memory system includes an array of bit cells arranged in rows and columns and configured to store bits of data, a reference bit cell, a plurality of bit lines connectable to the bit cells in the array and connecting to the reference bit cell, and a bit line controller. The bit line controller comprises a plurality of sense amps connected to the bit cells by the bit lines. The bit line controller determines the contents of the bit cells based on times tcompared to a time t, where tis the time required for a current Igenerated by one of the bit cells to raise a voltage Vof one of the sense amps by an amount ΔV, and tis the time required for a current Igenerated by the reference bit cell to raise the voltage Vof another one of the sense amps by the same ΔV. ΔV increases monotonically as a function of I.