The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2020

Filed:

Dec. 25, 2017
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Yi-Fan Li, Tainan, TW;

Kuo-Chin Hung, Changhua County, TW;

Wen-Yi Teng, Kaohsiung, TW;

Ti-Bin Chen, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/417 (2006.01); H01L 29/49 (2006.01); H01L 29/423 (2006.01); H01L 29/161 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41775 (2013.01); H01L 21/31116 (2013.01); H01L 29/161 (2013.01); H01L 29/42364 (2013.01); H01L 29/495 (2013.01); H01L 29/6653 (2013.01); H01L 29/66545 (2013.01); H01L 29/7848 (2013.01);
Abstract

A semiconductor structure is disclosed. The semiconductor structure includes first and second metal gates on a substrate with a gap therebetween. The first metal gate has a first sidewall, and the second metal gate has a second sidewall directly facing the first sidewall. A contact etch stop layer (CESL) is disposed within the gap and extends along the first and second sidewalls. The CESL has a first top portion adjacent to a top surface of the first metal gate and a second top portion adjacent to a top surface of the second metal gate. The first top portion and the second top portion have a trapezoid cross-sectional profile. A first sidewall spacer is disposed on the first sidewall and between the CESL and the first metal gate. A second sidewall spacer is disposed on the second sidewall and between the CESL and the second metal gate.


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