The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2020
Filed:
Oct. 30, 2018
Renesas Electronics Corporation, Tokyo, JP;
Kazuyuki Nakagawa, Tokyo, JP;
Keita Tsuchiya, Tokyo, JP;
Yoshiaki Sato, Tokyo, JP;
Shuuichi Kariyazaki, Tokyo, JP;
Norio Chujo, Tokyo, JP;
Masayoshi Yagyu, Tokyo, JP;
Yutaka Uematsu, Tokyo, JP;
RENESAS ELECTRONICS CORPORATION, Tokyo, JP;
Abstract
A semiconductor device includes a semiconductor chip mounted over a wiring substrate. A signal wiring for input for transmitting input signals to the semiconductor chip and a signal wiring for output for transmitting output signals from the semiconductor chip are placed in different wiring layers in the wiring substrate and overlap with each other. In the direction of thickness of the wiring substrate, each of the signal wirings is sandwiched between conductor planes supplied with reference potential. In the front surface of the semiconductor chip, a signal electrode for input and a signal electrode for output are disposed in different rows. In cases where the signal wiring for output is located in a layer higher than the signal wiring for input in the wiring substrate, the signal electrode for output is placed in a row closer to the outer edge of the front surface than the signal electrode for input.