The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2020

Filed:

Dec. 28, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Nai-Han Cheng, Zhudong Township, TW;

Chi-Ming Yang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01B 11/14 (2006.01); G01B 11/16 (2006.01); G01B 11/24 (2006.01); H01L 21/67 (2006.01); H01L 21/768 (2006.01); H01L 25/00 (2006.01); H01L 21/66 (2006.01); H01L 21/68 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67288 (2013.01); G01B 11/14 (2013.01); G01B 11/161 (2013.01); G01B 11/2441 (2013.01); H01L 22/20 (2013.01); H01L 21/76898 (2013.01); H01L 22/12 (2013.01); H01L 23/562 (2013.01); H01L 24/11 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/1146 (2013.01); H01L 2224/131 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/17181 (2013.01); H01L 2224/94 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/3511 (2013.01);
Abstract

The present disclosure, in some embodiments, relates to a substrate metrology system. The substrate metrology system includes a substrate warpage measurement module configured to determine one or more substrate warpage parameters of a substrate by taking a plurality of separate measurements at a plurality of different positions over a substrate. The substrate has a plurality of conductive interconnect layers within a dielectric structure over a semiconductor substrate and a conductive bump disposed over the dielectric structure and configured to be coupled to an additional substrate of a multi-dimensional chip. A substrate metrology module has an optical component and is configured to measure one or more dimensions of the conductive bump. A position control element is configured to move the optical component. A feed-forward path is coupled between an output of the substrate warpage measurement module and an input of the position control element.


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