The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2020

Filed:

Jan. 25, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jae-seok Kim, Seoul, KR;

Jin-hee Kang, Yongin-si, KR;

Ji-hoon Kang, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/08 (2010.01); H01L 33/38 (2010.01); H01L 33/46 (2010.01); H01L 33/00 (2010.01); H01L 33/20 (2010.01); H01L 33/60 (2010.01); H01L 33/62 (2010.01);
U.S. Cl.
CPC ...
H01L 33/08 (2013.01); H01L 33/382 (2013.01); H01L 33/46 (2013.01); H01L 33/007 (2013.01); H01L 33/20 (2013.01); H01L 33/60 (2013.01); H01L 33/62 (2013.01);
Abstract

A method of manufacturing a light emitting diode is provided. The method includes forming a semiconductor layer on a substrate, forming a mask layer including a plurality of grooves on the semiconductor layer, forming a plurality of nanostructures in the plurality of grooves, respectively, forming an etched region by etching an outer region of the semiconductor layer and an inner region of the semiconductor layer different from the outer region, forming a first electrode on the etched region of the semiconductor layer, forming an insulation layer on the first electrode, and forming a second electrode on the insulation layer and the plurality of nanostructures.


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