The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2020

Filed:

Jun. 30, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bahaa Fahim, Santa Clara, CA (US);

Swadesh Choudhary, Mountain View, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/30 (2006.01); G06F 11/34 (2006.01); G06F 11/14 (2006.01); G06F 11/36 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3485 (2013.01); G06F 11/1446 (2013.01); G06F 11/349 (2013.01); G06F 11/3636 (2013.01); G06F 11/079 (2013.01); G06F 11/3037 (2013.01); G06F 11/3461 (2013.01); G06F 2201/84 (2013.01); G06F 2201/86 (2013.01); G06F 2201/885 (2013.01);
Abstract

In one embodiment, a processor comprises a fabric interconnect to couple a first cache agent to at least one of a memory controller or an input/output (I/O) controller; and a first cache agent comprising a cache controller coupled to a cache; and a trace and capture engine to periodically capture a snapshot of state information associated with the first cache agent; trace events to occur at the first cache agent in between captured snapshots; and send the captured snapshots and traced events via the fabric interconnect to the memory controller or I/O controller for storage at a system memory or storage device.


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