The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Jul. 24, 2018
Applicant:

Shanghai Huahong Grace Semiconductor Manufacturing Corporation, Shanghai, CN;

Inventor:

Shufan Yan, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 29/423 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/28 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 21/027 (2006.01);
U.S. Cl.
CPC ...
H01L 21/033 (2013.01); H01L 21/027 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/28 (2013.01); H01L 21/28035 (2013.01); H01L 29/0696 (2013.01); H01L 29/0869 (2013.01); H01L 29/1095 (2013.01); H01L 29/4236 (2013.01); H01L 29/4238 (2013.01); H01L 29/4916 (2013.01); H01L 29/66348 (2013.01); H01L 29/66734 (2013.01); H01L 29/7813 (2013.01); H01L 21/26586 (2013.01);
Abstract

Trench gate power MOSFET with an on-region. Cells in the on-region include a first epitaxial layer and a channel region. First trenches corresponding to polysilicon gates penetrate through the channel region, and each polysilicon gate is etched to form a groove in the top, the grooves filled with an interlayer film. A source region formed on side faces of the grooves in a self-aligned mode through angled ion implantation. Through the source region of a side structure, the surface of a portion, between the first trenches, of the channel region is directly exposed and formed with a well contact region. A front metal layer is formed on the surfaces of the cells in the on-region and leads out a source. The front metal layer of the source directly makes contact with well contact region and source region to form a connection structure without contact holes.


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