The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Oct. 10, 2014
Applicant:

Corning Incorporated, Corning, NY (US);

Inventors:

Darwin Gene Enicks, Painted Post, NY (US);

John Tyler Keech, Painted Post, NY (US);

Aric Bruce Shorey, Webster, NY (US);

Windsor Pipes Thomas, III, Painted Post, NY (US);

Assignee:

CORNING INCORPORATED, Corning, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/15 (2006.01); H01L 21/683 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); H01L 21/486 (2013.01); H01L 23/15 (2013.01); H01L 24/83 (2013.01); H01L 24/94 (2013.01); H01L 23/49827 (2013.01); H01L 2221/68318 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68331 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/83052 (2013.01); H01L 2224/8385 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/05432 (2013.01); H01L 2924/05442 (2013.01); H01L 2924/1033 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10271 (2013.01); H01L 2924/10329 (2013.01); H01L 2924/12 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/1432 (2013.01); H01L 2924/1461 (2013.01); H01L 2924/15788 (2013.01); H01L 2924/201 (2013.01); H01L 2924/2011 (2013.01); H01L 2924/2064 (2013.01); H01L 2924/20107 (2013.01); H01L 2924/20641 (2013.01); H01L 2924/20642 (2013.01);
Abstract

A thin sheet () disposed on a carrier () via a surface modification layer () to form an article (), wherein the article may be subjected to high temperature processing, as in FEOL semiconductor processing, not outgas and have the thin sheet maintained on the carrier without separation therefrom during the processing, yet be separated therefrom upon room temperature peeling force that leaves the thinner one of the thin sheet and carrier intact. Interposers () having arrays () of vias () may be formed on the thin sheet, and devices () formed on the interposers. Alternatively, the thin sheet may be a substrate on which semiconductor circuits are formed during FEOL processing.


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