The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Dec. 13, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Chen Koren, Hadera, IL;

Dan Baum, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/16 (2006.01); G06F 7/544 (2006.01); G06F 7/523 (2006.01); G06N 3/04 (2006.01); G06N 3/063 (2006.01); G06N 3/08 (2006.01); G06F 9/30 (2018.01); G06N 3/02 (2006.01);
U.S. Cl.
CPC ...
G06F 17/16 (2013.01); G06F 7/523 (2013.01); G06F 7/5443 (2013.01); G06N 3/04 (2013.01); G06N 3/063 (2013.01); G06N 3/08 (2013.01); G06F 9/30007 (2013.01); G06N 3/02 (2013.01);
Abstract

An accelerator for increasing the processing speed of a processor. The accelerator operates in two distinct modes. In a first mode for dense layer processing, row data sets and column data sets are sent to a multiplier for multiplication. In a second mode for sparse layer processing compressed row data sets are received by a row multiplexer and compressed column data sets are received by a column multiplexer. Each multiplexer is configured to compare the indexes of data sets with one another to determine matching indexes. When indexes match, the matching data sets are selected and sent to the multiplier for multiplication. When indexes do not match, data sets are stored in memory devices for subsequent cycles.


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