The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2019
Filed:
Sep. 18, 2017
Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;
Stmicroelectronics (Crolles 2) Sas, Crolles, FR;
Francois Andrieu, Saint Ismier, FR;
Remy Berthelon, Saint Martin d'Heres, FR;
Commissariat A L'Energie Atomique et aux Energies Alternatives, Paris, FR;
STMICROELECTRONICS (CROLLES 2) SAS, Crolles, FR;
Abstract
An integrated circuit is provided, including a first pair including a first nMOS transistor and a first pMOS transistor; a second pair including a second nMOS transistor and a second pMOS transistor; the first and second pMOS transistors including a channel that is subjected to compressive stress and made of an SiGe alloy, and a gate of said transistors being positioned at least 250 nm from a border of an active zone of said transistors; a third pair including a third nMOS transistor having a same construction as the first nMOS transistor and a third pMOS transistor having a same construction as the second pMOS transistor and exhibiting a compressive stress that is lower by at least 250 MPa, the gate of said transistors of the third pair being positioned at most 200 nm from the border.