The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2019
Filed:
Dec. 19, 2017
Cadence Design Systems, Inc., San Jose, CA (US);
Arnold Ginetti, Antibes, FR;
Jean-Noel Pic, Valbonne, FR;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Disclosed herein are embodiments for generating hierarchical rotating pcells (parametrized cells) design from a user provided static hierarchical design. An EDA (Electronic Design Automation) tool may receive a hierarchical static design and allow the user to instantiate a top level hierarchical rotating pcell using one or more parameters including an angle parameter to indicate a rotation angle. Based on the one or more parameters, the EDA tool may recursively identify, in the user's static hierarchical design, lower level static cells and replace them with the hierarchical rotating pcells based on the angle parameter in the already instantiated upper level hierarchical rotating pcells. The EDA tool may instantiate and re-instantiate hierarchical rotating pcells until leaf-level cells have been reached to dynamically generate an IC (integrated circuit) design with hierarchical rotating pcells from the user's static hierarchical design such that rotation can be accomplished without flattening the IC design.