The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Jun. 01, 2018
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Gary L. Miller, Austin, TX (US);

Jeffrey Freeman, Austin, TX (US);

Huy Nguyen, Austin, TX (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/17 (2006.01); G06F 13/42 (2006.01); G06F 9/38 (2018.01); G06F 15/78 (2006.01);
U.S. Cl.
CPC ...
G06F 15/17 (2013.01); G06F 9/3885 (2013.01); G06F 13/42 (2013.01); G06F 15/7807 (2013.01); G06F 2205/063 (2013.01);
Abstract

A system and method wherein die-to-die communication are provided between a first die and a second die contained in a common integrated circuit (IC) package, a first processor on the first die communicatively coupled to the first connectivity circuitry by the first processor bus and configured to provide first bus transactions, to be provided to the second connectivity circuitry, to the first processor bus, the first connectivity circuitry configured to utilize a multiple simultaneous outstanding transaction capability supporting multiple simultaneous outstanding write transactions concurrent with multiple simultaneous outstanding read transactions, the second connectivity circuitry configured to provide processor bus flow control information and elasticity buffer status information pertaining to the elasticity buffer to the first connectivity circuitry via a common message for flow control.


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