The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Jul. 30, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Anand K. Enamandram, Folsom, CA (US);

Sivakumar Radhakrishnan, Portland, OR (US);

Jayasekhar Tholiyil, Portland, OR (US);

Tina C. Zhong, Portland, OR (US);

Malay Trivedi, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 9/4401 (2018.01); G06F 13/42 (2006.01); G06F 9/445 (2018.01);
U.S. Cl.
CPC ...
G06F 13/1663 (2013.01); G06F 9/4405 (2013.01); G06F 9/445 (2013.01); G06F 13/1668 (2013.01); G06F 13/4027 (2013.01); G06F 13/4282 (2013.01);
Abstract

Examples include an apparatus having a communications link bridge coupled to a plurality of processors to control connections between each of the plurality of processors and the apparatus; and a controller coupled to a memory over a memory interface to control access to the memory, the controller configured to, during system initialization, selectively bypass a token requirement for access to the memory for read requests by processors and allow multiple processors to read the memory concurrently.


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