The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2019
Filed:
Sep. 27, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Bryan L. Spry, Portland, OR (US);
Lily P. Looi, Portland, OR (US);
Shaun M. Conrad, Cornelius, OR (US);
Assignee:
INTEL CORPORATION, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/24 (2006.01); G06F 1/3287 (2019.01); G06F 1/3234 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/3253 (2013.01); G06F 1/3278 (2013.01); Y02D 10/151 (2018.01); Y02D 10/157 (2018.01); Y02D 10/171 (2018.01); Y02D 50/20 (2018.01);
Abstract
Improved power control techniques for integrated peripheral component interconnect express (PCIe) controllers are described. In one embodiment, for example, a processor circuit may comprise an integrated PCIe controller and logic to detect a power reduction trigger, disable the integrated PCIe controller, and remove power from the integrated PCIe controller based on a power removal setting for the integrated PCIe controller. Other embodiments are described and claimed.