The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2019
Filed:
Jun. 29, 2017
Intel Corporation, Santa Clara, CA (US);
Neel Shah, Billerica, MA (US);
Kirk S. Yap, Westborough, MA (US);
Amy L. Santoni, Scottsdale, AZ (US);
Michael Neve de Mevergnies, Beaverton, OR (US);
Oscar Mendoza, Shrewsbury, MA (US);
Sreejit Chakravarty, San Jose, CA (US);
Ramasubramanian Rajamani, Cupertino, CA (US);
Bryan J. Gran, Boylston, MA (US);
Sorin Iacobovici, San Jose, CA (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A processor, including: a core; system test circuitry, the system test circuitry configured to be locked except during an in-field system test (IFST) mode; IFST control circuitry; and a test interface controller, including: a data interface to receive a test packet; a parser to parse the test packet into a key, a signature, and a stored hash-of-hashes; a decryption circuit to decrypt the signature according to the key and to generate a computed hash-of-hashes; a hash circuit to verify the stored hash-of-hashes against the computed hash-of-hashes; and an IFST interface, wherein the test interface controller is to signal the IFST control circuitry to place the system test circuitry in IFST mode.