The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Feb. 17, 2019
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Biman Chattopadhyay, Karnataka, IN;

Ravi Mehta, Karnataka, IN;

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/02 (2006.01); H04L 7/00 (2006.01); H04L 25/03 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0087 (2013.01); H04L 7/02 (2013.01); H04L 25/03 (2013.01);
Abstract

A clock and data recovery (CDR) circuit receives a data signal and generates a clock signal and a recovered data signal. The CDR circuit includes a clock-recovery circuit (CRC), a sampling phase-recovery circuit (PRC), an analog-to-digital converter (ADC), and a data-recovery circuit (DRC). The CRC receives the data signal and generates an intermediate clock signal. The PRC receives the intermediate clock signal, a sampled data signal and the recovered data signal, and generates the clock signal. The ADC receives the data signal and generates the sampled data signal. The DRC receives the sampled data signal and generates the recovered data signal. The clock signal is phase and frequency synchronized with the data signal.


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