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G11C 11/00 (2006.01); H01L 45/00 (2006.01); H01L 43/12 (2006.01); H01L 43/02 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); G11C 11/16 (2006.01);

U.S. Cl.

CPC ...

H01L 45/1233 (2013.01); G11C 11/161 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01); H01L 45/06 (2013.01); H01L 45/141 (2013.01); H01L 45/146 (2013.01); H01L 45/16 (2013.01);

Abstract

Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.

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