The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Jun. 01, 2018
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Zhenghao Gan, Shanghai, CN;

Junhong Feng, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/16 (2006.01); G11C 11/412 (2006.01); H01L 29/06 (2006.01); H01L 27/11 (2006.01); H01L 29/08 (2006.01); G11C 11/419 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66636 (2013.01); G11C 11/412 (2013.01); G11C 11/419 (2013.01); H01L 27/1104 (2013.01); H01L 29/0649 (2013.01); H01L 29/0847 (2013.01); H01L 29/1608 (2013.01); H01L 21/3065 (2013.01); H01L 29/66659 (2013.01);
Abstract

The present disclosure relates to the field of semiconductor technologies, and discloses semiconductor devices and manufacturing methods for the same. A semiconductor device may include: a substrate; a first active region on the substrate; a first gate structure positioned on the first active region; and a first source and a first drain that are positioned in the first active region and respectively on two sides of the first gate structure, where a size of the first drain is larger than a size of the first source. In forms of the present disclosure, because the size of the first drain is larger than the size of the first source, a current from the first drain to the first source is greater than a current from the first source to the first drain, so that the semiconductor device can make a read current relatively low and a write current relatively high in a static random access memory (SRAM), thereby improving a read margin and a write margin.


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