The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2019
Filed:
Sep. 08, 2017
Applicants:
Stmicroelectronics SA, Montrouge, FR;
Stmicroelectronics (Crolles 2) Sas, Crolles, FR;
Inventors:
Alain Chantre, Seyssins, FR;
SĂ©bastien Cremer, Sassenage, FR;
Assignees:
STMicroelectronics SA, Montrouge, FR;
STMicroelectronics (Crolles 2) SAS, Crolles, FR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 6/12 (2006.01); H01S 5/026 (2006.01); H01S 5/10 (2006.01); H01S 5/02 (2006.01); H01S 5/042 (2006.01); H01S 5/343 (2006.01);
U.S. Cl.
CPC ...
G02B 6/12002 (2013.01); G02B 6/12004 (2013.01); H01S 5/026 (2013.01); H01S 5/1032 (2013.01); H01S 5/021 (2013.01); H01S 5/0262 (2013.01); H01S 5/0422 (2013.01); H01S 5/34306 (2013.01); H01S 2301/176 (2013.01);
Abstract
A photonic integrated circuit may include a silicon layer including a waveguide and at least one other photonic component. The photonic integrated circuit may also include a first insulating region arranged above a first side of the silicon layer and encapsulating at least one metallization level, a second insulating region arranged above a second side of the silicon layer and encapsulating at least one gain medium of a laser source optically coupled to the waveguide.