The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Apr. 15, 2019
Applicant:

Guangdong University of Technology, Guangzhou, Guangdong, CN;

Inventors:

Yun Chen, Guangdong, CN;

Xin Chen, Guangdong, CN;

Dachuang Shi, Guangdong, CN;

Xun Chen, Guangdong, CN;

Qiang Liu, Guangdong, CN;

Jian Gao, Guangdong, CN;

Chengqiang Cui, Guangdong, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
C25D 21/04 (2006.01); C25D 5/02 (2006.01); C25D 7/12 (2006.01); C25D 3/38 (2006.01); H01L 21/288 (2006.01); H01L 21/768 (2006.01); C25D 17/00 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
C25D 5/024 (2013.01); C25D 3/38 (2013.01); C25D 5/022 (2013.01); C25D 7/12 (2013.01); C25D 17/001 (2013.01); C25D 21/04 (2013.01); H01L 21/288 (2013.01); H01L 21/76898 (2013.01); H01L 23/53228 (2013.01);
Abstract

A method for synchronous electroplating filling of differential vias and an electroplating device. Laser irradiation is adopted as an external energy field to assist synchronous electroplating filling of differential vias. A mask or digital maskless technology is used to precisely heat the vias with different positions and different sizes. The filling rate of different regions varies with the temperature difference, thereby realizing the synchronous electroplating filling of differential vias in one step. In the processes of immersion pre-wetting by the electroplating liquid and electroplating filling copper, the laser is used for preheating the wafer processed with vias. In these two steps, the laser needs to locally and precisely heat upper surfaces of the micro vias on the wafer through the mask corresponding to the micro vias on the wafer.


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