The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2019

Filed:

Dec. 24, 2015
Applicant:

Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai, CN;

Inventors:

Sannian Song, Shanghai, CN;

Xiaogang Chen, Shanghai, CN;

Zhitang Song, Shanghai, CN;

Tianqi Guo, Shanghai, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 13/00 (2006.01); H01L 27/10 (2006.01); H01L 27/24 (2006.01); H01L 45/00 (2006.01); G11C 7/10 (2006.01); G11C 11/54 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0026 (2013.01); G11C 7/1006 (2013.01); G11C 11/54 (2013.01); G11C 13/003 (2013.01); G11C 13/0004 (2013.01); G11C 13/004 (2013.01); G11C 13/0023 (2013.01); G11C 13/0069 (2013.01); H01L 27/101 (2013.01); H01L 27/2409 (2013.01); H01L 45/04 (2013.01); G11C 2213/72 (2013.01); G11C 2213/79 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/144 (2013.01);
Abstract

A storage array and a storage chip and method for storing a logic relationship between objects. The storage array comprises first leading-out wires and second leading-out wires, and a storage unit is connected between each first leading-out wire and each second leading-out wire having different serial numbers. A controllable switch is connected between each first leading-out wire and each second leading-out wire having a same serial number. The storage chip comprises an interface module. A control module is used for producing a control signal. A driving module is used for producing write current, erase current or read current. A first decoder and a second decoder are used for gating the first leading-out wires and the second leading-out wires. A storage array is used for storing a logic relationship value. The storage method comprises write and read operations.


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