The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2019
Filed:
Jun. 06, 2017
Cadence Design Systems, Inc., San Jose, CA (US);
Breno Rodrigues Guimarães, Belo Horizonte, BR;
Caio Araujo Teixeira Campos, Austin, TX (US);
Björn Håkan Hjort, Göteborg, SE;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
The present disclosure relates to a method for electronic design verification. Embodiments may include receiving, using a processor, at least one electronic design file and a set of inputs from a user, wherein the at least one electronic design file and set of inputs are associated with an electronic design. Embodiments may further include performing formal verification on at least a portion of the electronic design and determining, using a model checker, one or more conflicts associated with a variable during the formal verification. Embodiments may also include translating the one or more conflicts into one or more corresponding signal names and displaying, at a graphical user interface, the corresponding signal names.