The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2019
Filed:
Mar. 30, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Patrik Eder, Taufkirchen, DE;
Rolf H. Kuehnis, Portland, OR (US);
Enrico D. Carrieri, Placerville, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/267 (2006.01); G06F 11/25 (2006.01); G01R 31/317 (2006.01);
U.S. Cl.
CPC ...
G06F 11/267 (2013.01); G06F 11/25 (2013.01); G01R 31/31705 (2013.01);
Abstract
Methods and apparatuses relating to a multiple master capable debug interface are described. In one embodiment, an apparatus includes a device circuit, a debug and test access port to debug and test the device circuit, and a switching circuit to switch a debug and test mastership between the debug and test access port and a data access port to the device circuit that is not dedicated to debug and test.