The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2019

Filed:

Nov. 26, 2014
Applicant:

Tokyo Seimitsu Co., Ltd., Tokyo, JP;

Inventors:

Yuichi Ozawa, Tokyo, JP;

Yasuhito Iguchi, Tokyo, JP;

Tetsuo Yoshida, Tokyo, JP;

Junzo Koshio, Tokyo, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 1/073 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 1/07378 (2013.01); G01R 31/2889 (2013.01);
Abstract

A wafer inspection method improving inspection accuracy and operation efficiency. A method for performing electrical inspection by bringing into contact with pads in chips on a wafer. A chuck step S1 for heating the wafer to an inspection temperature; a first position recognition step S2 for recognizing all the positions of the pads; a second position recognition step S3 for re-recognizing, before performing the electrical inspection, the position of the pads recognizing the positional shifts of the pads due to thermal expansion; and a correction step S4 for correcting contact positions with respect to the probes, the contact positions being corrected on the basis of pad positions, which have been re-recognized in the second position recognition step S3 on the basis of the pad positions recognized in the first position recognition step S2, and which have been updated.


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