The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

May. 22, 2018
Applicant:

Samsung Electro-mechanics Co., Ltd., Suwon-si, KR;

Inventors:

Byeong Hak Jo, Suwon-si, KR;

Jong Ok Ha, Suwon-si, KR;

Jeong Hoon Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03G 3/20 (2006.01); H03F 1/02 (2006.01); H03F 3/345 (2006.01); H03G 3/30 (2006.01); H03F 3/21 (2006.01); H03F 3/19 (2006.01); H03F 3/24 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0222 (2013.01); H03F 3/19 (2013.01); H03F 3/21 (2013.01); H03F 3/245 (2013.01); H03F 3/345 (2013.01); H03G 3/3042 (2013.01); H03F 2200/102 (2013.01); H03F 2200/451 (2013.01);
Abstract

An envelope tracking (ET) current bias circuit includes a rectifying circuit, a phase compensation circuit, and a voltage/current conversion circuit. The rectifying circuit is configured to detect an envelope voltage from a radio frequency (RF) signal. The phase compensation circuit is configured to compensate for a phase of the envelope voltage in which the phase thereof is delayed in the rectifying circuit to output a phase compensated enveloped voltage. The voltage/current conversion circuit is configured to convert the phase compensated envelope voltage into an ET bias current.


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