The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

May. 16, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jeong Ho Lee, Suwon-si, KR;

Myung Sam Kang, Suwon-si, KR;

Young Gwan Ko, Suwon-si, KR;

Shang Hoon Seo, Suwon-si, KR;

Jin Su Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5389 (2013.01); H01L 23/3128 (2013.01); H01L 23/3135 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 25/0652 (2013.01); H01L 24/02 (2013.01); H01L 24/16 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/18 (2013.01); H01L 2225/06548 (2013.01);
Abstract

A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion having a stopper layer; a semiconductor chip having connection pads and disposed in the recess portion so that an inactive surface is connected to the stopper layer; a first encapsulant covering at least portions of the semiconductor chip and filling at least portions of the recess portion; an electronic component disposed on the other surface of the frame opposing one surface of the frame in which the semiconductor chip is disposed; a second encapsulant covering at least portions of the electronic component; and a connection member disposed on the frame and an active surface of the semiconductor chip and including a redistribution layer, wherein the connection pads and the electronic component are electrically connected to each other through the wiring layers and the redistribution layer.


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