The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2019

Filed:

Nov. 30, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Arojit Roychowdhury, Bangalore, IN;

Ramanathan Sethuraman, Bangalore, IN;

Ajaya V. Durg, Austin, TX (US);

Rakesh A. Ughreja, Bangalore, IN;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3287 (2019.01); G06F 1/3225 (2019.01); G06F 1/324 (2019.01); G06F 1/3234 (2019.01); G06F 1/3296 (2019.01); G11C 5/14 (2006.01); G06F 15/78 (2006.01); G06F 1/3237 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/324 (2013.01); G06F 1/3225 (2013.01); G06F 1/3237 (2013.01); G06F 1/3243 (2013.01); G06F 1/3253 (2013.01); G06F 1/3275 (2013.01); G06F 1/3296 (2013.01); G06F 15/781 (2013.01); G11C 5/148 (2013.01); Y02D 10/126 (2018.01); Y02D 10/128 (2018.01); Y02D 10/14 (2018.01); Y02D 10/151 (2018.01); Y02D 10/152 (2018.01); Y02D 10/171 (2018.01); Y02D 10/172 (2018.01); Y02D 50/20 (2018.01);
Abstract

Methods and apparatus to permit a system low power consumption state when CPU (Central Processing Unit) or generically any compute element is active are described. In an embodiment, a fabric and a memory controller are caused to enter a low power consumption state at least partially in response to a determination that the fabric and the memory controller are idle. The entry into the low power consumption state occurs while a compute element, coupled to the fabric and the memory controller, is in an active state. Other embodiments are also disclosed and claimed.


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Roychowdhury, Arojit. (2019). Enabling system low power state when compute elements are active (U.S. Patent No. 10474219). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10474219

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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