The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2019
Filed:
Sep. 30, 2017
Cadence Design Systems, Inc., San Jose, CA (US);
Taranjit Singh Kukal, New Delhi, IN;
Arnold Jean Marie Gustave Ginetti, Antibes, FR;
Preeti Chauhan, Moradabad, IN;
Nikhil Gupta, New Delhi, IN;
Vikas Aggarwal, Faridabad, IN;
Vikrant Khanna, Noida, IN;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Disclosed are methods, systems, and articles of manufacture for implementing a schematic circuit design component as a transmission line model in a schematic driven extracted view for an electronic design. These techniques identify a schematic circuit component design form a schematic design of an electronic design and identify or determine layout device information of a layout circuit component design corresponding to the schematic circuit component design. An extracted view may be generated or identified for the electronic design at least by using a transmission line model based in part or in whole upon connectivity information or a hierarchical structure of the electronic design. The electronic design may then be modified or updated based in part or in whole upon results of performing one or more analyses on the extracted view with the transmission line model.