The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Mar. 30, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd, Hsinchu, TW;

Inventors:

Ching-Yen Hsaio, Tainan, TW;

Cheng-Ming Wu, Tainan, TW;

Shih-Lu Hsu, Tainan, TW;

Chien-Hsian Wang, Minxiong Township, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 21/28 (2006.01); H01L 21/027 (2006.01); H01L 27/11521 (2017.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); H01L 21/0273 (2013.01); H01L 21/0276 (2013.01); H01L 21/28008 (2013.01); H01L 21/28273 (2013.01); H01L 21/32139 (2013.01); H01L 29/0649 (2013.01); H01L 29/42324 (2013.01); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01);
Abstract

A method for forming a semiconductor device structure is provided. The method includes forming a gate stack and a conductive layer over a semiconductor substrate. The semiconductor substrate has a first region and a second region isolated from each other by an isolation structure in the semiconductor substrate. The gate stack is formed over the first region. The method includes forming a negative photoresist layer over the first region and a first portion of the conductive layer over the isolation structure to cover the gate stack. The method includes forming a mask layer over the negative photoresist layer and the conductive layer. The mask layer has trenches over a second portion of the conductive layer. The method includes removing the second portion through the trenches. The method includes removing the mask layer. The method includes removing the negative photoresist layer.


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Hsaio, Ching-Yen. (2019). Method for forming semiconductor device structure (U.S. Patent No. 10461088). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10461088

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