The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2019
Filed:
Jul. 28, 2017
Applicant:
Monolithic Power Systems, Inc., San Jose, CA (US);
Inventor:
Hunt Hang Jiang, Saratoga, CA (US);
Assignee:
Monolithic Power Systems, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/13 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 2224/0347 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03464 (2013.01); H01L 2224/03825 (2013.01); H01L 2224/03914 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05022 (2013.01); H01L 2224/05096 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05547 (2013.01); H01L 2224/05557 (2013.01); H01L 2224/05559 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/1147 (2013.01); H01L 2224/11462 (2013.01); H01L 2224/11825 (2013.01); H01L 2224/11848 (2013.01); H01L 2224/11901 (2013.01); H01L 2224/13007 (2013.01); H01L 2224/1357 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13562 (2013.01); H01L 2224/13611 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/80801 (2013.01); H01L 2224/80815 (2013.01); H01L 2924/014 (2013.01); H01L 2924/0105 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/181 (2013.01);
Abstract
An integrated circuit (IC) chip includes a copper structure with an intermetallic coating on the surface. The IC chip includes a substrate with an integrated circuit. A metal pad electrically connects to the integrated circuit. The copper structure electrically connects to the metal pad. A solder bump is disposed on the copper structure. The surface of the copper structure has a coating of intermetallic. The copper structure can be a redistribution layer and a copper pillar that is disposed on the redistribution layer.