The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Nov. 25, 2015
Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventors:

Masanao Sasaki, Nishigo-mura, JP;

Hiromasa Hashimoto, Nishigo-mura, JP;

Kei Fujiyama, Nishigo-mura, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/304 (2006.01); B24B 57/02 (2006.01); B24B 37/005 (2012.01); B24B 37/04 (2012.01); B24B 55/12 (2006.01);
U.S. Cl.
CPC ...
H01L 21/304 (2013.01); B24B 37/0056 (2013.01); B24B 37/04 (2013.01); B24B 55/12 (2013.01); B24B 57/02 (2013.01);
Abstract

The present invention is method for polishing silicon wafer, the method including recovering used slurry containing polishing abrasive grains that have been supplied to the silicon wafer and used for polishing, and circulating and supplying the recovered used slurry to the silicon wafer to polish the silicon wafer, wherein mixed alkali solution containing chelating agent and either or both of a pH adjuster and a polishing rate accelerator is added to the recovered used slurry without adding unused polishing abrasive grains, and the recovered used slurry is circulated and supplied to the silicon wafer to polish the silicon wafer. As a result, there is provided a method for polishing a silicon wafer that can suppress the occurrence of metal impurity contamination and stabilize the composition (e.g., the concentration of the chelating agent) of the used slurry when the used slurry is circulated and supplied to the silicon wafer for polishing.


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