The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2019

Filed:

Oct. 27, 2017
Applicant:

Ferroelectric Memory Gmbh, Dresden, DE;

Inventor:

Stefan Müller, Dresden, DE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); G11C 11/22 (2006.01); H01L 29/78 (2006.01); H01L 27/11585 (2017.01); H01L 29/06 (2006.01); H01L 29/51 (2006.01); G11C 16/04 (2006.01); H01L 21/28 (2006.01); H01L 27/1159 (2017.01);
U.S. Cl.
CPC ...
G11C 11/2275 (2013.01); G11C 11/221 (2013.01); G11C 11/223 (2013.01); G11C 11/2273 (2013.01); G11C 16/04 (2013.01); G11C 16/0408 (2013.01); H01L 21/28291 (2013.01); H01L 27/1159 (2013.01); H01L 27/11585 (2013.01); H01L 29/0673 (2013.01); H01L 29/516 (2013.01); H01L 29/785 (2013.01); H01L 29/78391 (2014.09);
Abstract

According to various embodiments, a memory cell may include: a channel region, a gate isolation structure disposed at the channel region; and a memory structure disposed over the gate isolation structure, the memory structure comprising a first electrode structure, a second electrode structure, and at least one remanent-polarizable layer disposed between the first electrode structure and the second electrode structure; wherein the first electrode structure, the gate isolation structure, and the channel region form a first capacitor structure defining a capacitor area of a first size; and wherein the first electrode structure, the at least one remanent-polarizable layer, and the second electrode structure form a second capacitor structure defining a capacitor area of a second size, wherein the second size is less than the first size.


Find Patent Forward Citations

Müller, Stefan. (2019). Memory cell and methods thereof (U.S. Patent No. 10460788). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10460788

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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