The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2019
Filed:
Jul. 01, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/42 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G11C 11/4076 (2006.01); G11C 11/4093 (2006.01); G11C 7/10 (2006.01); G11C 16/32 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1673 (2013.01); G06F 13/4068 (2013.01); G06F 13/42 (2013.01); G11C 11/4076 (2013.01); G11C 11/4093 (2013.01); G11C 7/1066 (2013.01); G11C 16/32 (2013.01); G11C 2207/2254 (2013.01);
Abstract
A storage circuit includes a buffer coupled between the storage controller and the nonvolatile memory devices. The circuit includes one or more groups of nonvolatile memory (NVM) devices, a storage controller to control access to the NVM device, and the buffer. The buffer is coupled between the storage controller and the NVM devices. The buffer is to re-drive signals on a bus between the NVM devices and the storage controller, including synchronizing the signals to a clock signal for the signals. The circuit can include a data buffer, a command buffer, or both.